Ing. Bruno Fernandes

• Development of high-level uniform FPGA programming Framework (Simulink, TCL/TQ); • VHDL developer - behavioural, synthesis, verification and implementation (ISE, ModelSIM, Altera); • Development and design (Schematic Capture, Layout) of custom PCBs for high speed/throughput Boards (Altium, Eagle) ; • Development of software for FPGA firmware development (TCL, Python, PyQt, C++); • Supervising and supporting students on related projects;

Responsible for the laboratory classes in Electronic Circuits and Digital Systems (1st year mandatory class for Physics, Biomedical and Biophysics engineering students)

Analysis of the specification, timing constraints and implementation/development of VHDL modules to perform FFT, Interleaver, Puncture and Demodulator functions suitable for a UWB (Ultra Wideband) receiver based on MB-OFDM modulation. Validation in FPGAs. Target FPGAs: Xilinx Virtex-4 e Virtex-5. Main tools used: Emacs, Xilinx ISE 10, ChipScope 10 and Matlab. Project Ref PTDC/EEA-ELC/67993/2006 Website of the Project: http://esda.inesc-id.pt/UWBR/

Implementation, validation in laboratory and development of low-level software communication for the MICTP module level, a subsystem of the muon detector in the ATLAS experiment. (Dissertation theme for Physics Engineer MSc degree.) Target FPGA: Altera Stratix-II. Main tools used: Xemacs, Altera Quartus II (9.0), ModelSim (6.4a) and Synplify (C-2009.03).