Pratheek Satheesh Babu

I worked on developing a prototype of a satellite On-board Processor for Regenerative Payloads. My responsibilities include FPGA design VHDL, integrating third-party DVB-S2X IPs, testing the design on evaluation boards with Xilinx FPGA, and performing measurements of RF parameters. Some of the minor tasks were to develop C++/Python applications to access data from DDR3 memory through high-speed interfaces such as the PCIe interface.

The thesis focused on the implementation of calibration techniques to achieve reciprocity in the transceiver RF front-end for implicit channel sounding in WLAN applications. The implicit channel sounding mechanism is one of the techniques used in MIMO systems to obtain CSI between the Tx and the Rx. In this thesis, I implemented an end-to-end PHY layer WLAN system with non-linearities in the RF front-end blocks on MATLAB to simulate and analyse the advantages of implicit channel sounding on the beamforming.

My responsibilities were focused on RF hardware systems and component measurement, and characterisation. I characterised the ADC and DAC present in the RFSoC by measuring and evaluating several key RF parameters like EVM, ACLR, IMD3, NSD, Phase Noise, Phase Stability, etc. The characterisation was executed by developing LabVIEW drivers for the DUT, and measurements were taken on the NI PXI platform with NI RF Signal Generator, RF Signal Analyzer, and integrated DUT.

I was part of a communication system development team and I worked on the digital pre-distortion (DPD) module and eCPRI IP (5G front-haul network). My tasks included RTL coding in VHDL, performing the unit test with a testbench, integrating the module with the system and simulating with a testbench, synthesising the system, performing static timing analysis on the realised communication system and testing the system on the custom-made hardware with Altera FPGA.