Stefan Rebernig

Angestellt, Teamlead Sales Deterministic Ethernet, TTTech Computertechnik AG

Wien, Österreich

Fähigkeiten und Kenntnisse

Teamwork skills
flexible
C/C++
"Java EE"
PHP
".NET framework"
VHDL
"Computer Architecture"
"Embedded Systems"
Microcontroller
SoC
FPGA
Altera tools
NIOS
"Operating Systems"
Windows
Linux
"Shell Scripting"
"Analytical Skills"
"Mathematical Skills"
TTEthernet
AVB
Ethernet
"Networking technologies"

Werdegang

Berufserfahrung von Stefan Rebernig

  • Bis heute 7 Jahre und 5 Monate, seit Jan. 2017

    Teamlead Sales Deterministic Ethernet

    TTTech Computertechnik AG

    Running the sales activities and team around Deterministic Ethernet IP and Software licensing.

  • 2 Jahre, Jan. 2015 - Dez. 2016

    Technical Sales Manager / Solution Architect

    TTTech Computertechnik AG

    Promoting and selling Deterministic Ethernet IP and Software to customers as a Technical Sales manager and customer-facing solution architect.

  • 1 Jahr und 8 Monate, Mai 2013 - Dez. 2014

    Chip IP Architect

    TTTech Computertechnik AG
  • 1 Jahr und 10 Monate, Juli 2011 - Apr. 2013

    Chip IP Design Engineer

    TTTech Computertechnik AG

    Developing Chip IP models in VHDL. Business development in the field of automotive Ethernet.

  • 4 Monate, März 2011 - Juni 2011

    Tutor

    Vienna University Of Technology

    Tutor for "Microcontroller" Lab supervision

  • 11 Monate, März 2010 - Jan. 2011

    Tutor

    Vienna University of Technology

    Tutor for "Grundzüge der Informatik" Talks in front of an audience of 30-40 people.

  • 3 Jahre und 1 Monat, Okt. 2007 - Okt. 2010

    Software development

    Fa. Hofer Automations- und Regelungstechnik

    During summer terms from 2005 to 2010 I worked as an intern. Fields of operation: in a team developing a new generation of controller units, developing different modules for a data-recording system.

Ausbildung von Stefan Rebernig

  • 2 Jahre, Okt. 2010 - Sep. 2012

    Computer Engineering

    Vienna University of Technology

    My master thesis "Evaluation and Implementation of a mixed TTEthernet and AVB network" defines a methodology and switch implementation which combines TTEthernet and AVB in a single network without influencing each other, i.e., all benefits remain unaffected.

  • 2 Jahre und 10 Monate, Okt. 2007 - Juli 2010

    Computer Engineering

    Vienna University of Technology

  • 4 Jahre und 10 Monate, Sep. 2002 - Juni 2007

    EDV und Organisation

    HTL Villach

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Muttersprache

Interessen

Information Technology
Computer Science
Computer Architectures
Mathematics
Physics
Rock Music
Movies
Games
Chess
Traveling
Photography
...

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