Ing. Aleksandr Shadrin

- Design of memory compilers on transistor and block level - SRAM, ROM, DRAM, EEPROM, OTP in CMOS 180nm/110nm/65nm - Radiation-Hardened memory design - Margin and yield analysis of memory cells and compilers - Design of test vehicles with memory bitcells - Schematic, layout, physical verification DRC/LVS/ERC/PEX, Liberty, LEF, EM/IR - Automation of analog simulations and views verification (Perl, bash, skill, Python) - In-Memory Computing hardware implementation

Microelectronics Digital circuits Analog circuits Semiconductor physics