Dr. Evgeny Chernyavskiy
Angestellt, Chip Design and Technology Expert, IGBT/Opto/MEMS/SCR/APD/2DEG/SiC/GaN
Berlin, Deutschland
Werdegang
Berufserfahrung von Evgeny Chernyavskiy
Bis heute 3 Jahre und 2 Monate, seit März 2021
Chip Design and Technology Expert
IGBT/Opto/MEMS/SCR/APD/2DEG/SiC/GaN
Areas of Scientific Research: Chip Layout Design, Numerical simulation (Silvaco TCAD), Semiconductor Device Engineering, Process Technology improvement, Failure analysis, Fast ESD protection design.
Chip Design
9 Monate, Feb. 2011 - Okt. 2011
Design Technology Interface Expert
Lantig A GmbH, Villach, Austria
Project transfer from fabless company to foundries (tapeout, PDK adjustment, PCM data Simulation and Analysis). Technology interface to GLOBALFOUNDRIES (65G), TSMC (65LP, 40LP). Analog ESD protection development for TSMC 40LP technology.
Novell avalanche photodiode R&D, Geiger mode with single photon counting and avalanche self-quenching capability
3 Jahre und 6 Monate, Dez. 2005 - Mai 2009
Chip Design Senior Engineer
IXYS Semiconductor GmbH
Superjunction MOSFET (CoolMOS) HV-IGBT 5.2 kV Thermal runaway suppression Junction termination extension with variation lateral doping JTE VLD
23 Jahre, Jan. 1983 - Dez. 2005
Senior Engineer/Senior Researcher
Various semiconductor companies
Semiconductor devices Engineering
Ausbildung von Evgeny Chernyavskiy
4 Jahre und 1 Monat, Jan. 2000 - Jan. 2004
Semiconductor Physics
Institute of Semiconductor Physics
Sprachen
Englisch
Muttersprache
Russisch
Muttersprache
Deutsch
Fließend