Rade Radjenovic

Angestellt, Head of R&D in Access System Department, IRITEL

Belgrade, Serbien

Fähigkeiten und Kenntnisse

Agile
SCRUM
Software Development
FPGA Design
FPGA Verification
Hardware Development
Cryptography
Linux
VoIP
Ethernet
Embedded Design
VHDL
VHDL Development
FPGA
Microcontroller
Encryption
TDD
Continuous Integration
Development
Product Development
Agile Software Development
C/C++
SVN
CVS
Hardware Design
PCBs
Verilog Vhdl
R&D
Software Engineering

Werdegang

Berufserfahrung von Rade Radjenovic

  • Bis heute 13 Jahre und 6 Monate, seit Jan. 2011

    Head of R&D in Access System Department

    IRITEL

    Facilitate agile framework and coordinate team effort to develop new devices with the focus on high speed & proprietary encryption and VDSL broadband access.

  • 3 Jahre und 9 Monate, Mai 2007 - Jan. 2011

    Project Manager

    IRITEL

    Manage development of new devices especially focus on new management principles and encryption.

  • 5 Jahre, Juni 2002 - Mai 2007

    Project Manager

    IRITEL

    Manage development of new devices with focus on new packet technologies and DSL.

  • 4 Jahre und 2 Monate, Mai 1998 - Juni 2002

    Project Manager

    IRITEL

    Manage and improving development of existing multiplexing equipment with digital interfaces with the focus on delivering new Multiservice Access platform and NMS.

  • 8 Jahre, Juni 1990 - Mai 1998

    Team Leader Board & System Level Architect

    IRITEL

    Lead development, PCB schematics and layout, FPGA integration and microprocessor software for different types of boards, line cards.

  • 1 Jahr und 3 Monate, Apr. 1989 - Juni 1990

    Associated Developer

    IRITEL

    FPGA Designer

Ausbildung von Rade Radjenovic

  • 5 Jahre und 1 Monat, Okt. 1983 - Okt. 1988

    Faculty of Electrical Engineering

    Belgrade University

    Telecommnications

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Grundlagen

Interessen

Passionate bicycle rider

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