SANI MD ISMAIL

- Digital design using Verilog + scripting (e.g. Python) for several IPs as well as complex architectures (e.g. Micro-controllers and SoCs) - Verification platform and IP development (System-Verilog, UVM, Assertions, OOP,CRV) - System-Verilog behavioral model development of Digital/Mixed signal modules - Synthesis, DFT, ATPG & Scan Insertion - Fault Injection using ZOIX(Synopsys)-> Design debugging for possible transient faults

Digital Design & Verification, Physical Design/Sign-off (180 nm, 28nm and 22 nm), C++ Programming, Lab Measurements TECHNICAL SKILLS HDL: Verilog & System-Verilog (advanced), VHDL(intermediate) Programming/Scripting: TCL, PERL, Python, C/C++, Scheme CADENCE Tools: Virtuoso, Encounter/Innovus, NCSIM MENTOR GRAPHICS Tools: ModelSim, Questa, Calibre SYNOPSYS Tools: VCS, Design Compiler, IC Compiler, starRC, PrimeTime Others: Xilinx, Agilent ADS, MATLAB, TCAD, Origin-Lab, HFSS

Development and Implementation of A Digital Calibration Algorithm for High-precision ADC • Developing a digital foreground calibration algorithm • Developing Matlab and Verilog models, extracting performance parameters (SNDR, ENOB, SFDR) • Functional verification of Verilog model and comparison with Matlab model

• Implementing Colpitts Oscillators using HBT device • Phase noise analysis of High frequency Colpitts Oscillator • Analysis of benchmark digital circuits using CNTFET

• Physical Design (RTL to GDSII) of several block and top level design (180nm, 45 nm technology) • Analog/Custom Layout Design of several I/O & macro cells with physical Verification (Process technology: 90nm, 28nm, 65nm) • Training new recruits to develop EDA tool & IC design skills

***Masters Thesis: Development and Implementation of A Digital Calibration Algorithm for High-precision ADC ***Masters Project Work: A Place & Route Study for Point-to-Point NoC Links in 28 nm CMOS Technology

Bachelor Thesis: Design of Integrated Variable Inductor on Silicon Substrate