Saravana Murthy Palanisamy
Abschluss: Masters, University of Stuttgart
Stuttgart, Deutschland
Werdegang
Berufserfahrung von Saravana Murthy Palanisamy
Bis heute 5 Jahre und 3 Monate, seit März 2019
Test System and System Test Engineer
AKKA
HIL Test Bench and Model development with Simulink for Engine Management (ECM), Transmission Control (TCM) and Central Powertrain (CPC) ECUs for Daimler MFA2H Hybrid Vehicles Project. Hardware in Loop Testing for ECM, TCM and CPC ECUs for Daimler MFA2H Hybrid Vehicles Project. Tools: Vector CANoe, VTestStudio, ProveTech TA, INCA, DOORS, Polarion, Mindmap, dSpace, Simulink
2 Jahre und 9 Monate, Juni 2016 - Feb. 2019
Wissenschaftlicher Angestellter
Institute for Parallel and Distributed Systems, University of Stuttgart
Research in the area of Privacy in Internet of Things, Big data. Teaching assistant for courses like Operating Systems, Real time Concepts for Embedded Systems, Mobile Computing and Distributed Systems.
1 Jahr, Mai 2015 - Apr. 2016
Test Engineer
Valeo Schalter und Sensoren GmbH
Testing for Automatic Parking Systems for VW, Ford, Daimler Projects
8 Monate, Sep. 2014 - Apr. 2015
Internship - Test Engineer
Valeo Schalter und Sensoren GmbH
2 Jahre und 3 Monate, Juni 2011 - Aug. 2013
Software Engineer
Robert Bosch Engineering and Business Solutions LimitedWorked in Engine Management Systems for Fiat Power Train Commercial Vehicles Segment
Ausbildung von Saravana Murthy Palanisamy
2 Jahre und 6 Monate, Okt. 2013 - März 2016
Infotech (Embedded Systems)
University of Stuttgart
Embedded Systems, Industrial Automation, Real Time Programming, Intelligent Sensors and Actors
3 Jahre und 10 Monate, Aug. 2007 - Mai 2011
Electrical and Electronics Enginnering
Anna University
Embedded Sytsems, Control Engineering, Electronic Circuits
Sprachen
Englisch
Fließend
Deutsch
Gut