THEERTHARAMESHA LAKSHMIDEVARAHALLI CHANDRASHEKAR

Emulation Zebu model build owner Responsible for bringing up SOC/subsystem pre-silicon emulation models on Zebu emulator Performed simulation integration to emulation and built private model to enable tests Monitored the emulation mocks/turn-ins and debugged compile / zebu build flow failures Supported the team members to debug issues observed during the runs on emulation infrastructure

To run and understand the simulation tests, generation of Firmware hex files to be loaded onto the Emulation models To run the basic sanity checks for the model releases. Integrate new test cases on Emulation Model to improve the Integrity Analyze and route cause the runtime and compile time errors and providing solutions/fixes for the customer issues and feature enhancements Creating and maintaining chip force file for runtime environment.

development of the microarchitecture interacting with customers for the requirement clarification and new features enabling RTL Coding of sub block like Image acquisition & image formation in Verilog, RTL Coding of sub block to generate the Timing Signals to CCD & A2D IC, Presentation & Demo of the product to the customers along with tools training Lab bring-up activity – Debug, root cause and resolution of the issues

Requirement analysis and discussion with customers Prepared the hardware Schematic based on the customer requirement in Orcad Tool Given support for the software development team that includes pic microcontroller software development. Debugging and fixing the Real time hardware issues in the lab & customer places Done the first level of complete test and created the test report Worked along with the multiple teams & ensured that deadlines, quality standards, and customer expectations were met